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Polysynth wavetable voice | ||||||||||||
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This is big name for a small thing. Up to 4K samples may be stored in each of 8 voices. Voices use 8-bit DACs. DACs are also VCAs - envelope voltage drives DAC's reference input. Kind of strange approach, but it seamed great when I designed it. Usually waves are 32 samples long, but 128 of such waves may be looped, or sequenced by LFO. Hard to explain it in words. Hear some examples:
Specifications
SCHEMATIC Signal names abbreviations:
How does it work Play the samples Let's assume 4KB long free running sample. DCO addresses provide lover 5 bits of sample position while upper 7 are generated in binary counter clocked with A4 address. Don't be confused by RAM's address pin names - I have no respect for it. I/E is high and so is EXT. A4 clocks counter U2B through gates U3C & D. U2A is clocked from U2B making 8-bit counter (actually it is 7-bit, but we'll get there). When highest bit of this 8-bit counter goes high it resets itself to 0 through R1-D1 network (assuming that 1/S is high), and whole cycle repeats. Now suppose S/S is high - GATE pulses are able now to get to the counter. R4 is an example of simplest approach to level converters. GATE signal is 0/+12V while sampler is supplied from +5V. Together with U3's input protection diodes R4 is sufficient for that purpose. Anyway, GATE goes through NANDs U3B & U3A and resets the counter by short pulse formed in C1-R3 network. As a result the wave starts from the beginning with every key on for that voice. Let's play more. Put 1/S low. When highest counter bit goes high it gets stacked on R1 and does not reset the counter. The same signal put on CLK input of U2B stops the counter (well, it works that way - see 4518 data sheet). The only address generated now is the one from DCO (5 bits) and the counter is stopped at 127 value (7Fh) so all you hear is 32 bytes long wavecycle. This is also the way to play only those 32B waves. RAM data goes to DAC and from that point my Polysynth begins to be analog. This, I hope, gives some idea of how it works and how to control it. Program the RAM As previously mentioned during play GAx = 0V and #GAx = 5V allowing DCO addresses to go unaffected to RAM chip. R5-R9 also serve as level converters from DCO's 0/12V to standard 0/5V. 12V is clipped on diodes which are connected to #GAx lines. During programming GAx and #GAx lines are at the same levels and provide lowest 5 bits of wave address overriding anything coming from DCO. Data written to the RAM is put on GDx lines, which thanks to R10-R17 have no affect during play. When write strobe (#WR) signal is low, R10-R17 are sufficient to drive Z-stated data lines of RAM. This is how to program 32B packs. To write entire (or rather 4KB) space, EXT pulses are required. So, program 32B, enter EXT pulse, program 32B and so on... Parts
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© 2004 Roman Sowa Last revised September 22, 2004 |